COSC 201, Fall, 1999

Exam 2 from 1997

1.(a)Write the four-bit (including sign bit) two's complement representation for the numbers -5 and 6.

(b)Show how to carry out the operation(-5) - 6 in four-bit two's-complement notation.

(c)How can you tell whether an overflow occurs in a finite-precision two's-complement addition or subtraction?Did an overflow occur in the operation in part (b) ?

2.(a)The hexadecimal number found in a single precision floating point register is 0xC1660000.Assuming the IEEE 754 standard representation for single precision floating point numbers is used, what number, in decimal, does this represent?

(b)Why does the IEEE 754 representation of floating point numbers use bias- 127 notation for the exponent for single precision and bias-1023 notation for double precision numbers?
3.(a)Represent a one-bit full adder with a box with a plus symbol, represent a multiplexor with an oval with MUX on it, and use the usual logical gates.Sketch the diagram for a single bit ALU which can do the following operations:AND, OR, Addition using input a and input b or Not b.

(b)Show how four one-bit ALUs as constructed in part (a) can be wired together to form a four-bit ALU which can do bit-wise AND, bit-wise OR, Addition and Subtraction.Indicate what control lines are needed and what they do.

(c)Explain why the ripple-carry scheme for propagating carries through an ALU is inefficient as the number of bits in the operands get larger.

4. (a)Sketch the circuit for doing a floating-point multiply.Use the floating point registers below for the top of your circuit and show a similar floating point register at the bottom for storing the result.(b) Explain how the floating-point multiply is carried out on your circuit.


5. (a)What limits the clock cycle time for a single cycle CPU?

(b)Use the attached diagram for a single clock cycle CPU (the diagram with the large control oval near the center).Specify how each of the control lines A-I is set for each of the following instructions (for F indicate what the ALU should do):

beq$rd, $rt, $rs


sw$rd, addr($rs)


6.Use the diagram for a multicycle CPU (the one with red and green letters).Indicate how the control lines will be set for each of the following.Use X to indicate it doesn't matter for a given control line, use 1 to indicate a Read or Write signal is given, 0 that it is not.

(a)The Fetch Instruction cycle


(b)The Instruction Decode / Register Fetch / Branch Target Compute cycle


(c)The remaining cycles for a lw(Load Word) instruction (note what each cycle does and give the control line settings).

Name of CycleABCDEFRWWreg PCWrite

(d)The remaining cycles for a j (Jump) instruction.

Name of CycleABCDEFRWWreg PCWrite

7.(a)What is an exception? Give examples.

(b)How is a program restarted in the correct state and at the correct instruction after an exception has been handled by system code?