COSC 201: Computer Organization

Lab 7: Single Cycle CPU -- part 1

Learn how to put together components to create a single cycle MIPS (simplified) CPU
Complete the circuits for a single cycle MIPS CPU, given several components.
Read Chapter 4 from H&P, 4.1-4.4
Files to Use
           MiscComponents.circ, CPUComponents.circ, control.circ, SingleCycleCPU.circ, fileSpecs.pdf , fileSpecs.docx, controls.rtf , controls.docx (completed for homework)
           test.s, arraySum.s, arraydata.mem 
What to Hand In
Week 1: Completed SingleCycleCPU.circ and CPUComponents.circ using "fake" controls.


This is a two week lab. In the first week, you should complete the circuit for a MIPS CPU that supports several basic instructions. The control part of this circuit will be filled in with fake controls that can be set by the user to test the data-path. The instructions to be supported are listed in the file controls.rtf that was to be completed for homework 4; this includes a couple more instructions than the book has for its single-cycle CPU (addi, ori). These additional instructions do not need any additional hardware, just appropriate control signals.

The second week of the lab will be to complete the control part of the CPU circuit. Then this will be tested by using code that does a simple operation on arrays.

The circuit files that are used are described in the file filespecs.rtf.

Week 1

1. Complete the two components BranchAddress and Jump Address in the CPUComponents.circ file.

BranchAddress has the PC+4 and the sign-extended immediate (which still needs to be shifted left) as inputs and should output the Branch Target Address.

JumpAddress has the PC+4 and the 26-bit partial jump address (which should be shifted left) from the instruction as inputs and should output the full Jump Address.

2. Open (or close and reopen) the SingleCycleCPU.circ file. Complete the datapath circuit using the added components and the appropriate wires and multiplexors.

Note: you should read filespecs.doc and keep it for reference as you wire the circuit. You may find the book or powerpoint diagrams of the single cycle cpu helpful as well. Note that the order of the control outputs is not the same as in the powerpoint or the book - it is listed in filespecs.doc.

2. A ten-bit input to the top connection for the fake-control and a four-bit input to the top connection for fake-ALUControl have been included in the circuit. These are used to directly enter the outputs for these control circuits for testing. The real controls will be completed in the second part of this lab.

2. Use the fake-control and fake-ALUcontrol to test your circuit using the settings specified in controls.doc -- from homework 4.

a. Load the file test.s into the MARS simulator. Assemble and run. Write down the hex code for the two instructions that replace the pseudo-instruction la

b. Under the file menu, select dump memory and set dump-format to "hexadecimal text", then dump to a file, call it test.mem. This file now contains the machine code for this test program. We must do two things before we can use it with the LogiSim circuit:

delete the two lines that correspond to the la instruction, as noted above (this is because in LogiSim, the data memory starts at 0.)

add the following two lines at the top of the file:

v2.0 raw

leave no blank lines, one machine instruction per line (the 00000000 is a nop at the beginning or your code)

c. Now open you datapath circuit in LogiSim. Under the Simulation menu, reset-Simulation. Then right-click on the instruction memory and load image, selecting test.mem. This puts your machine code into the instruction memory.

d. Click the clock to get the first non-zero instruction highlighted. Using the file test.s for reference, set the fake controls and the fake ALU controls to match what they should be for this instruction (addi is the first). Then click the clock twice to move to the next instruction.

e. After each instruction is executed, you can check the contents of the registers by right-clicking on the register bank and selecting view registers. Then right-click on the appropriate register4 block (the third from the top contains registers t0, t1, t2, t3, and the fourth contains register t4). You can check if the contents have the expected values.

f. The next to last instruction is a branch which should not be taken, so the simulation should move on to the next instruction. The last instruction is a branch which should be taken and consequently leaves you at the same instruction. You can test the jump instruction at this point by entering its controls. then you should jump to line ff in the instruction memory. (Our instruction memory only uses the low eight bits in the jump address, which in the last instruction are 0xff.)