COSC 201: Computer Organization

Lab 7: Single Cycle CPU -- part 1

Purpose
Learn how to put together components to create a single cycle ARMv8 (simplified) CPU
Method
Complete the circuits for a single cycle ARMv8 CPU, given several components.
Preparation
Read Chapter 4 from H&P, 4.1-4.4
Files to Use
           MiscComponents.circ, CPUComponents.circ, control.circ, SingleCycleCPU.circ, fileSpecs.docx, fileSpecs.pdf , controls.docx (completed for homework), controls.pdftest.s, test.mem, testdata.memarraySum.s, arraySum.mem, arraysumdata.mem 
What to Hand In
Week 1: Completed SingleCycleCPU.circ and CPUComponents.circ using "fake" controls.

Overview

This is a two week lab. In the first week, you should complete the circuit for a ARMv8 CPU that supports several basic instructions. The control part of this circuit will be filled in with fake controls that can be set by the user to test the data-path. The instructions to be supported are listed in the file controls.docx (controls.pdf) that was to be completed for homework 4.

The ARMv8 instructions implemented: add, sub, and, or, ldur, stur, cbz, b

The second week of the lab will be to complete the control part of the CPU circuit. Then this will be tested by using code that does a simple operation on arrays.

The circuit files that are used are described in the file filespecs.docx (filespecs.pdf).


Week 1

1. Complete the two components BranchAddress and BranchControl in the CPUComponents.circ file.

BranchAddress has the PC+4 and the sign-extended immediate (which still needs to be shifted left) as inputs and should output the Branch Target Address.

BranchControl has as inputs the unconditional branch control, the conditional branch control, and the zero signal (from ALU). Its output is the control signal for a multiplexor that selects eitherthe branch address or the PC+4 to write to the PC>

2. Open (or close and reopen) the SingleCycleCPU.circ file. Complete the datapath circuit using components from CPUComponents.circ and the appropriate wires and multiplexors. You will need to add the BranchAddress, BranchControl, and SignExtend components.

Note: you should read the filespecs and keep it for reference as you wire the circuit. You may find the book or powerpoint diagrams of the single cycle cpu helpful as well. Note that the order of the control outputs is not the same as in the the book - it is listed in filespecs.doc.

3. A ten-bit input to the top connection for the fake-control and a four-bit input to the top connection for fake-ALUControl have been included in the circuit. These are used to directly enter the outputs for these control circuits for testing. The real controls will be completed in the second part of this lab.

4. Use the fake-control and fake-ALUcontrol to test your circuit using the settings specified in controls.doc -- from homework 4.

a. Read the file test.s. This is the code you will run. The translation process results in machine code (in hex) given in test.mem.

b. Open your SingleCycleCPU.circ in LogiSim. Under the Simulation menu, reset-Simulation. Then right-click (2-finger click on a Mac) on the instruction memory and load image, selecting test.mem. This puts your machine code into the instruction memory.

c. Also load testdata.mem into the data memory: right-click on that memory and select the testdata.mem file.

d. Execute an instruction by putting the correct values into the control and ALU control inputs (use the control.docx file that you completed for homework to get the right values). Then click the clock icon twice. Do this for each instruction.

e. After each instruction you can check the contents of the registers to see if they are correct. Right click on the register file, select view registers. Right click again on the block of four registers you want (0-3, 4-7, 8-11, 12-15, etc from the top down) and view that set of four registers. The contents are shown in hex. For example, after the first two instructions, registers 9 and 10 should contain 6 and 5.

f. The notations in the test.s file indicate what should be in the registers. It also indicates which branches should be taken, which you can see by the instructions skipped in the instruction memory. Finally, the data memory should change after any stur instruction is executed.

g. When the run reaches the last instruction, it should continually repeat this instruction, effectively terminating the program.