COSC 201: Computer Organization

Lab 8: Single-Cycle CPU Datapath

Purpose: Learn how to implement instructions for a CPU.
Method: Work in teams of 2 to implement the datapath for the instruction set architecture from Lab 2.
Preparation: Read sections 5.1 through 5.3 in the textbook. Review the solution to Lab 2.
Files to Use: datapath.sim
What to Hand In: Completed datapath.sim.

The file datapath.sim contains an incomplete implementation of the instruction set architecture (ISA) from Lab 2. To simplify the implementation, the ISA has been modified to operate on 8-bit data words rather than 32-bit words. The main CPU circuit is similar to Figure 5.19 in the textbook. Your task is to complete the branch and arithmetic circuts.

Branch Circuit

The branch circuit calculates the address of the next instruction to be fetched. For sequential execution, the program counter is incremented by 1 (PC=PC+1). For branch instructions, a sign-extended offset is added to the address of the next instruction (PC=PC+1+offset).

Complete the branch subcircuit using an 8-bit adder, an 8-bit two-way multiplexor, and a 4-to-8 bit sign extension circuit. Take some time to look inside each subcircuit to familiarize yourself with its operation.

When the branch control signal is 0 (false), the output of this circuit should be PC+1. When branch is 1 (true), the output should be PC+1+offset, where the offset is the 8-bit sign extension of the 4-bit address input.

Note that the carry input of the adder can be used to add 1 to the sum of two other numbers.

Arithmetic Circuit

The arithmetic circuit contains the registers and ALU. For the add, sub, and cmp instructions, the ALU operatates on the rd and rs registers. For the addi instruction, the ALU adds the rd register to a sign-extended immediate value. For the lw and sw instructions, the ALU adds the ra register to a sign-exteneded immediate value to calculate a memory address.

Complete the arithmetic subcircuit using an 8-bit ALU (which can add or subtract), a register file with four 8-bit registers, a 2-to-8 bit sign extension circuit, an 8-bit two-way multiplexor, and a pair of 2-bit two-way multiplexors. Take some time to look inside each subcircuit to familiarize yourself with its operation.

The control signals for this circuit should be interpreted as follows.

When the RegWrite control signal is 1 (true), data is written to the register indicated by the rd field. When RegWrite is 0 (false), no registers are changed.
The Immediate control signal is 1 (true) for the addi instruction and 0 (false) for all other instructions.
When the Source control signal is 0 (false), the ALU operates on two registers. When Source is 1 (true), the ALU operates on a register and a sign-extended immediate value.
When the Subtract control signal is 1 (true), the ALU subtracts its lower operand from the upper operand. When Subtract is 0 (false), the ALU adds its operands.
The Zero output should be 1 (true) when the ALU result is zero.
The Negative output should be 1 (true) when the ALU result is a negative two's-complement number.

Note that the rd and ra fields, which can determine the upper register file output for some instructions, are in different positions. Use a multiplexor to select the field for the upper register output.

Note that the immediate fields used by the addi instruction and the lw/sw instructions are in different positions. Use a multiplexor to select the field for the input of the sign extension circuit.

Each team should hand in one copy of the file datapath.sim in the ~/courses/201/assignments directory of one team member. Send e-mail to your instructor indicating where the file can be found. Be sure that your names appear in the comments for the main circuit.